The main role of the body bias method in the static power reduction techniques

The threshold voltage Vth can be defined as the gate voltage Vg when the inversion with a density similar to that of the concentration of substrate starts at an oxide SiO2 interface in a CMOS device.

When the gate voltage Vg is not enough to reach threshold voltage Vth, the width W of the depletion region under the gate is a function of the gate voltage Vg.

Threshold voltage dependence on substrate doping density

1. The threshold voltage Vth is less sensitive to the doping density of the substrate when the doping density of the substrate is low. The threshold voltage Vth is not sensitive to the doping density of the substrate when the gate oxide SiO2 is very thin.

2. The threshold voltage Vth of the enhancement type PMOS transistor is negative and the threshold voltage Vth of depletion type NMOS device is negative when the doping density of the substrate is low.

3. The threshold voltage Vth of the depletion type NMOS device is more than zero when the doping density of the substrate is large.
 
A primary method to achieve the high ON current Ion in the active mode and low OFF current Ioff in the sleep mode is to, adjust the threshold voltage Vth by applying Body bias dynamically is called VTCMOS Variable threshold CMOS.

1. For the low threshold voltage i.e. low-Vth devices, the RBB reverse body bias can be applied during the sleep mode of the device to reduce the overall leakage. But too much of RBB reverse body bias, for example, less than negative 1.2V (-1.2V) leads to greater junction leakage through BTBT band to band tunneling.

2. For the high threshold voltage i.e. high-Vth devices, the FBB forward body bias can be applied during the active mode of the device to increase the overall performance. But too much FBB forward body bias, greater than 0.4V leads to the transient/substantial current through the substrate or body B to source S diodes.

The above circuit shows how the body bias is applied to a CMOS inverter. This body bias can also be implemented on the power gating transistors to turn OFF these transistors more effectively during the sleep mode of the device. 

We will require an additional set of the power supply rails Vbbn (for substrate) and Vbbp(for well) to distribute the well voltage and substrate voltages respectively.