The circuits which accept the input that can change at arbitrary times and produces output with a nonzero probability of Metastability are Synchronizers. The sequential logic elements are mainly characterized by the setup and hold times. If the input data changes before the setup time the output reflects a different new value after a bounded delay. If the input data changes after the hold time the output reflects a different old value after a bounded delay. and If the input data changes between the setup and hold time constraint or aperture then the output may be unpredictable and irrelevant. That is the output may go to a metastable state. Now let us analyze how a Latch will respond to a voltage that will change